Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
T2M-IP, a global semiconductor IP provider and ASIC services partner, today announced the global availability of its complete RISC-V CPU IP portfolio, spanning ultra-low-power MCU-class cores to ...
IAR extends its RISC-V toolchain support to SiFive’s automotive E7A and S7A IP cores. Dec. 24, 2025 – IAR and SiFive, Inc. have announced support for SiFive’s Automotive IP ...
The Government of India has announced the launch of the Linux-compatible DHRUV64 (VEGA AS2161) dual-core 64-bit RISC-V MPU ...
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Arm stock declines massively as Qualcomm acquires RISC-V designer Ventana Micro, suggesting plans to deepen its work with the ...
SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...
Arm dominates the microprocessor architecture business, as its licensees have shipped 150 billion chips to date and are shipping 50 billion more in the next two years. But RISC-V is challenging that ...
SiFive Inc., a computer chip startup that’s developing processor technology based on the open-source RISC-V instruction set architecture, said today it has raised a hefty $175 million in a late-stage ...
I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP ...
A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...